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    产品名称:汽车用16位微控制器

    意法半导体ST10微控制器系列提供各种车用器件。 本系列集成可由128扩展到832 Kbytes的单电压嵌入式闪存。 本系列采用0.18纳米CMOS工艺技术,具有5 V电源和内置片上稳压器。
    - 带有DSP单元的高性能ST10内核
    - 丰富的软件和工具
    - 丰富的外设和接口选择,同一外设可在ST10系列中通用
    - 单个5 V电源
    - 高质量嵌入式闪存(55 °C温度条件下数据可保存20年)

    ST10F272B
    Description
    The ST10F272B and ST10F272E devices are derivatives of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers.
    These two derivatives slightly differ on the available RAM size and Analog Channel Input number. These points will be highlighted in the corresponding chapters.
    For all information that is common to the 2 derivatives, the generic ST10F272 name will be used.
    The ST10F272 combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
    ST10F272 is processed in 0.18mm CMOS technology. The MCU core and the logic is supplied with a 5V to 1.8V on-chip voltage regulator. The part is supplied with a single 5V supply and I/Os work at 5V.

    Key Features
    16-bit CPU with DSP functions
    31.25ns instruction cycle time at 64MHz max CPU clock
    Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator
    Enhanced boolean bit manipulations
    Single-cycle context switching support
    On-chip memories
    256 Kbyte Flash memory (32-bit fetch)
    Single voltage Flash memories with erase/program controller and 100K erasing/programming cycles.
    Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C)
    2 Kbyte internal RAM (IRAM)
    10/18 Kbyte extension RAM (XRAM)
    Programmable external bus configuration & characteristics for different address ranges
    Five programmable chip-select signals
    Hold-acknowledge bus arbitration support
    Interrupt
    8-channel peripheral event controller for single cycle interrupt driven data transfer
    16-priority-level interrupt system with 56 sources, sampling rate down to 15.6ns
    Timers
    Two multi-functional general purpose timer units with 5 timers
    Two 16-channel capture / compare units
    4-channel PWM unit + 4-channel XPWM
    A/D converter
    24-channel 10-bit
    3μs minimum conversion time
    Serial channels
    Two synch. / asynch. serial channels
    Two high-speed synchronous channels
    One I2C standard interface
    2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2x32 message, C-CAN version)
    Fail-safe protection
    Programmable watchdog timer
    Oscillator watchdog
    On-chip bootstrap loader
    Clock generation
    On-chip PLL with 4 to 8 MHz oscillator
    Direct or prescaled clock input
    Real time clock and 32 kHz on-chip oscillator
    Up to 111 general purpose I/O lines
    Individually programmable as input, output or special function
    Programmable threshold (hysteresis)
    Idle, power down and stand-by modes
    Single voltage supply: 5V ±10%

    ST10F272M
    Description
    The ST10F272M device is a new derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers.
    The ST10F272M combines high CPU performance (up to 20 million instructions per second) with high peripheral functionality and enhanced I/O capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
    The ST10F272M is processed in 0.18mm CMOS technology. The MCU core and the logic is supplied with a 5V to 1.8V on-chip voltage regulator. The part is supplied with a single 5V supply and I/Os work at 5V.
    The ST10F272M is an optimized version of the ST10F272E, upward compatible with the following set of differences:
    Maximum CPU frequency is 40 MHz
    Reduced range for the Standby Voltage: VStby must be in the range of 4.5 to 5.5V.
    Identification registers: the IDMEM register reflects the Flash type difference and can be used to differentiate the two devices by software
    Improved EMC behavior thanks to the introduction of an internal RC filter on the 5V for the ballast transistors

    Key Features
    16-bit CPU with DSP functions
    50ns instruction cycle time at 40 MHz max CPU clock
    Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator
    Enhanced boolean bit manipulations
    Single-cycle context switching support
    On-chip memories
    256 Kbyte Flash memory (32-bit fetch)
    Single voltage Flash memories with erase/program controller and 100K erasing/programming cycles.
    Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C)
    2 Kbyte internal RAM (IRAM)
    18 Kbyte extension RAM (XRAM)
    Programmable external bus configuration & characteristics for different address ranges
    5 programmable chip-select signals
    Hold-acknowledge bus arbitration support
    Interrupt
    8-channel peripheral event controller for single cycle interrupt driven data transfer
    16-priority-level interrupt system with 56 sources, sampling rate down to 25ns
    Timers
    2 multi-functional general purpose timer units with 5 timers
    Two 16-channel capture / compare units
    Serial channels
    2 synch. / asynch. serial channels
    2 high-speed synchronous channels
    One I2C standard interface
    24-channel A/D converter
    16-channel 10-bit, accuracy ±2 LSB
    8-channel 10-bit, accuracy ±5 LSB
    4.85 μs minimum conversion time
    4-channel PWM unit + 4-channel XPWM
    2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2x32 message, C-CAN version)
    Fail-safe protection
    Programmable watchdog timer
    Oscillator watchdog
    On-chip bootstrap loader
    Clock generation
    On-chip PLL with 4 to 8 MHz oscillator
    Direct or prescaled clock input
    Real-time clock and 32 kHz on-chip oscillator
    Up to 111 general purpose I/O lines
    Individually programmable as input, output or special function
    Programmable threshold (hysteresis)
    Idle, power-down and stand-by modes
    Single voltage supply: 5V ±10% (embedded regulator for 1.8V core supply)
    Temperature range: -40 to +125°C

    ST10F273E
    Description
    The ST10F273E device is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers.
    The ST10F273E combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
    ST10F273E is processed in 0.18mm CMOS technology. The MCU core and the logic is supplied with a 5 V to 1.8 V on-chip voltage regulator. The part is supplied with a single 5 V supply and I/Os work at 5 V.
    The device is upward compatible with the ST10F269 device, with the following set of differences:
    Flash control interface is now based on STMicroelectronics third generation of stand-alone Flash memories (M29F400 series), with an embedded Program/Erase Controller. This completely frees up the CPU during programming or erasing the Flash.
    Only one supply pin (ex DC1 in ST10F269, renamed into V18) on the QFP144 package is used for decoupling the internally generated 1.8V core logic supply. Do not connect this pin to 5.0 V external supply. Instead, this pin should be connected to a decoupling capacitor (ceramic type, typical value 10nF, maximum value 100nF).
    The AC and DC parameters are modified due to a difference in the maximum CPU frequency.
    A new VDD pin replaces DC2 of ST10F269.
    EA pin assumes a new alternate functionality: it is also used to provide a dedicated power supply (see VSTBY) to maintain biased a portion of the XRAM (16 Kbytes) when the main Power Supply of the device (VDD and consequently the internally generated V18) is turned off for low power mode, allowing data retention. VSTBY voltage shall be in the range 4.5 to 5.5 volts and a dedicated embedded low power voltage regulator is in charge to provide the 1.8 V for the RAM, the low-voltage section of the 32 kHz oscillator and the Real Time Clock module when not disabled. It is allowed to exceed the upper limit up to 6 V for a very short period of time during the global life of the device and exceed the lower limit down to 4 V when RTC and 32 kHz on-chip oscillator are not used.
    A second SSC mapped on the XBUS is added (SSC of ST10F269 becomes here SSC0, while the new one is referred as XSSC or simply SSC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic SSC and the new XSSC.
    A second ASC mapped on the XBUS is added (ASC0 of ST10F269 remains ASC0, while the new one is referred as XASC or simply as ASC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic ASC and the new XASC.
    A second PWM mapped on the XBUS is added (PWM of ST10F269 becomes here PWM0, while the new one is referred as XPWM or simply as PWM1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic PWM and the new XPWM.
    An I2C interface on the XBUS is added (see X-I2C or simply I2C interface).
    CLKOUT function can output either the CPU clock (like in ST10F269) or a software programmable prescaled value of the CPU clock.
    On-chip RAM memory and FLASH size have been increased.
    PLL multiplication factors have been adapted to new frequency range.
    A/D Converter is not fully compatible versus ST10F269 (timing and programming model). Formula for the conversion time is still valid, while the sampling phase programming model is different.
    Besides, additional 8 channels are available on P1L pins as alternate function: The accuracy reachable with these extra channels is reduced with respect to the standard Port5 channels.
    External Memory bus is affected by limitations on maximum speed and maximum capacitance load: ST10F273E is not able to address an external memory at 64 MHz with 0 wait states.
    XPERCON register bit mapping modified according to new peripherals implementation (not fully compatible with ST10F269).
    Bondout chip for emulation (ST10R201) cannot achieve more than 50MHz at room temperature (so no real time emulation possible at maximum speed).
    Input section characteristics are different. The threshold programmability is extended to all port pins (additional XPICON register); it is possible to select standard TTL (with up to 400mV of hysteresis) and standard CMOS (with up to 750mV of hysteresis).
    Output transition is not programmable.
    CAN module is enhanced: ST10F273E implements two C-CAN modules, so the programming model is slightly different. Besides, the possibility to map in parallel the two CAN modules is added (on P4.5/P4.6).
    On-chip main oscillator input frequency range has been reshaped, reducing it from 1 to 25 MHz down to 4 to 8 MHz. This is a low power oscillator amplifier, that allows a power consumption reduction when Real Time Clock is running in Power down mode, using as reference the on-chip main oscillator clock. When this on-chip amplifier is used as reference for Real Time Clock module, the Power-down consumption is dominated by the consumption of the oscillator amplifier itself.
    A second on-chip oscillator amplifier circuit (32 kHz) is implemented for low power modes: it can be used to provide the reference to the Real Time Clock counter (either in Power down or Stand-by mode). Pin XTAL3 and XTAL4 replace a couple of VDD/VSS pins of ST10F269.

    ey Features
    High performance 16-bit CPU with DSP functions
    31.25ns instruction cycle time at 64 MHz max CPU clock
    Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator
    Enhanced boolean bit manipulations
    Single-cycle context switching support
    Memory organization
    512 Kbyte on-chip Flash memory single voltage with erase/program controller (full performance, 32-bit fetch)
    100K erasing/programming cycles.
    Up to 16 Mbyte linear address space for code and data (5 Mbytes with CAN or I2C)
    2 Kbyte on-chip internal RAM (IRAM)
    34 Kbyte on-chip extension RAM (XRAM)
    Programmable external bus configuration & characteristics for different address ranges
    5 programmable chip-select signals
    Hold-acknowledge bus arbitration support
    Interrupt
    8-channel peripheral event controller for single cycle interrupt driven data transfer
    16-priority-level interrupt system with 56 sources, sampling rate down to 15.6ns
    Timers
    2 multifunctional general purpose timer units with 5 timers
    Two 16-channel capture / compare units
    4-channel PWM unit + 4-channel XPWM
    A/D Converter
    24-channel 10-bit
    3μs Minimum conversion time
    Serial channels
    2 synch. / asynch. serial channels
    2 high-speed synchronous channels
    I2C standard interface
    2 CAN 2.0B interfaces operating on 1 or 2 CAN busses (64 or 2x32 messages, C-CAN version)
    Fail-safe protection
    Programmable watchdog timer
    Oscillator watchdog
    On-chip bootstrap loader
    Clock generation
    On-chip PLL and 4 to 12 MHz oscillator
    Direct or prescaled clock input
    Real time clock and 32 kHz on-chip oscillator
    Up to 111 general purpose I/O lines
    Individually programmable as input, output or special function
    Programmable threshold (hysteresis)
    Idle, power down and stand-by modes
    Single voltage supply: 5 V ±10%.